The 74HC574 high speed octal D−type flip−flops utilize advanced silicon−gate P−well CMOS technology. They possess the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS−TTL loads. Due to the large output drive capability and the 3−STATE feature, these devices are ideally suited for interfacing with bus lines in a bus organized system. These devices are positive edge triggered flip−flops. Data at the D inputs, meeting the set−up and hold time requirements, are transferred to the Q outputs on positive going transitions of the CLOCK (CK) input. When a high logic level is applied to the OUTPUT CONTROL (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The 74HC logic family is speed, function, and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Features:-

• Typical Propagation Delay: 18 ns

• Wide Operating Voltage Range: 2 V – 6 V

• Low Input Current: 1 A Maximum

• Low Quiescent Current: 80 A Maximum

• Compatible with Bus−oriented Systems

• Output Drive Capability: 15 LS−TTL Loads